Power Debugging with JTAG
Debugging power management issues is traditionally done via the serial console, Android USB/ADB, or SSH eventually. Besides being tedious, it is also intrusive debugging (CPU regular execution flow …
| Talk Title | Power Debugging with JTAG |
| Speakers | Alexandre Bailon (Embedded Linux Kernel Senior Developper, BAYLIBRE), Patrick Titiano (SW Director, BayLibre) |
| Conference | Open Source Summit + ELC Europe |
| Conf Tag | |
| Location | Edinburgh, UK |
| Date | Oct 21-25, 2018 |
| URL | Talk Page |
| Slides | Talk Slides |
| Video | |
Debugging power management issues is traditionally done via the serial console, Android USB/ADB, or SSH eventually. Besides being tedious, it is also intrusive debugging (CPU “regular” execution flow periodically interrupted to log traces over the UART, a rather slow interface with blind windows during CPU power transitions). But there is another option: the JTAG port. Well known for deep kernel debugging, it used to be less popular for power debugging. Well, until now! JTAG port offers the only non-intrusive solution to monitor system activities. Leveraging already-available python libraries, it is now possible to monitor key power indicators (clock rates/states, power states, voltages, bus stats, etc) without altering the use-case power profile, from your host PC.Motivations, challenges, benefits, and results will be further exposed, including a demo of a “power dashboard” application.
